SDIChps (Jingxin Microelectronics) announced on August 20th the successful activation of its independently developed RapidIO 3.2 switch chip, the SR1820, and the RapidIO 3.2 – PCIe 4.0 bridge chip, the ST0420. The chips were received and successfully powered on August 18th, with all main functional test cases completed in under an hour.
SR1820: High-Performance RapidIO Switching
The SR1820 is a low-latency, 24-port, 48-channel RapidIO Gen3 switch chip boasting a peak switching capacity of 600Gbps. It supports single-channel speeds from 1.25 to 12.5Gbaud. Compared to its predecessor, the SR1820 offers double the switching performance, with forwarding latency as low as 100ns. It features plug-and-play capabilities, congestion detection, and can interoperate with MCUs, DSPs, FPGAs, ASICs, and bridge devices.
ST0420: Seamless RapidIO to PCIe Bridging
The ST0420 is a hardware-based PCIe and RapidIO bridge chip. It utilizes an embedded address mapping engine for direct conversion of dual-protocol transactions, enabling large-volume, high-speed data transfers without deep processor involvement. It also supports RDMA transmission capabilities. On the RapidIO side, it features 4×12.5Gbaud, providing 50Gbps line-speed conversion with a latency of less than 200ns.
Synergy in AI Applications
In AI parallel computing scenarios, the SR1820 and ST0420 can work together to enable GPU Direct RDMA. This combination delivers over 40Gbps bandwidth and sub-100-nanosecond latency, creating a high I/O interconnect path.
About SDIChps:
SDIChps Technology (Tianjin) Co., Ltd. was established in 2020 in Tianjin, focusing on the R&D, production, and sales of core chips for China’s new infrastructure. The company has put forth four strategic directions: software-defined interconnect, native security, neuromorphic computing, and data center (software-defined on-chip systems). They have applied for over 100 intellectual property rights, obtained 95 invention patent authorizations, and expanded their industry customer base to over 300.
RapidIO is a packet-switched interconnect protocol designed for high-performance embedded systems. It uses a three-layer hierarchical architecture (logical, transport, and physical layers) and supports chip-to-chip and board-to-board communication, serving as backplane connectivity for embedded devices. Its memory-mapped features allow direct access to remote node memory spaces, making it suitable for demanding real-time applications like multi-DSP collaborative signal processing, medical imaging, and radar/sonar data processing.
The SR1820’s predecessor, the NRS1800, was a RapidIO Gen2 switch chip offering 240Gbps non-blocking switching capacity. SDIChps has also introduced other domestic first-of-their-kind chips, including the NRS1800, SDI3210, ESW5610, PRB0400, JXW8848, SP5148, and NFS6400, with over ten more chips currently under development.
